The present invention relates to the field of semiconductor technology. Specifically, embodiments of the invention are directed to nanowire semiconductor device structures and manufacturing methods.
With the development of integrated circuits and the improvements in the degree of integration, there have been many difficulties and unsolved problems with conventional silicon integrated circuits based on single transistor functionality. For example, the ability to further increase the density of components on a chip is limited. Neuron MOS transistors (Neuron Metal-Oxide Semiconductor Field Effect Transistor, abbreviated as neuMOS or vMOS) as powerful single-cell transistors provide an effective way of addressing the increasing number of transistors in integrated circuits and interconnection lines.
A neuron MOS transistor has a floating gate, which is capacitively coupled to the input terminal. The functionalities of a neuron device are similar to those of the nerve cells forming the human brain, the eye, and the like. Specifically, a neuron device provides a weighted sum of a plurality of input signals and outputs a predetermined signal when the resultant weighted sum of input signals reaches a predetermined threshold value. Such a neuron device includes a weighting tool for providing a weighted sum of a plurality of input signals. When the weighted sum of input voltages reaches a predetermined value, the source and the drain of the neuron device become conducting with respect to each other. The weighting tool is equivalent to a synapse between neuron cells. For example, the weighting tool may include resistors and field effect transistors. A neuron transistor is equivalent to the cell body of a neuron cell.